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A biophysically accurate floating point somatic neuroprocessor

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageEnglish
Title of host publicationInternational Conference on Field Programmable Logic and Applications, 2009 (FPL 2009), Prague
Publisher or commissioning bodyInstitute of Electrical and Electronics Engineers (IEEE)
Publication dateAug 2009
Pages26 - 31
Number of pages6
ISBN (Print)9781424438921
DOIs
StatePublished

Publication series

Name
ISSN (Print)19461488

Conference

ConferenceInternational Conference on Field Programmable Logic and Applications
CountryCzech Republic
CityPrague
Period1/08/09 → …

Abstract

Biophysically accurate neuron models have emerged as a very useful tool for neuroscience research. These models are based on solving differential equations that govern membrane potentials and spike generation. The level of detail that needs to be presented in the model to accurately emulate the behaviour of an organic cell is still an open question, although the timing of the spikes is considered to convey essential information. Models targeting hardware are traditionally based on fixed point implementations and low precision algorithms which incur a significant loss of information. This, in turn, could affect the functionality of a bioelectronic neuroprocessor in an undefined way. In this paper, a 32-bit floating point reconfigurable somatic neuroprocessor is presented targeting an FPGA device for real-time processing. For each individual neuron, the dynamics of ionic channels are described by a set of first order kinetic equations. A dedicated CORDIC unit is developed to solve the nonlinear functions that regulate spike generation. The results have been verified using an experimental setup that combines an FPGA device and a digital-to-analogue converter.

Additional information

Rose publication type: Conference contribution Additional information: With accompanying conference presentation Sponsorship: Sponsor acknowledgments for Oversea Research Student Award (ORSAS) and Postgraduate Research Award of University of Bristol and funding supplied by the Micron Foundation (USA) Terms of use: Copyright © 2009 IEEE. Reprinted from International Conference on Field Programmable Logic and Applications, 2009 (FPL 2009). This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Bristol's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it.

Research areas

  • neuroprocessor, floating point, neuron models

Event

International Conference on Field Programmable Logic and Applications

Duration1 Aug 2009 → …
CountryCzech Republic
CityPrague

Event: Conference

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DOI

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