|Title of host publication||Unknown|
|Publisher or commissioning body||Institute of Electrical and Electronics Engineers (IEEE)|
|Pages||405 - 408|
|Number of pages||3|
|ISBN (Print)||078039464, 0780309464|
|State||Published - Apr 1993|
|Conference||IEEE International Conference on Acoustics, Speech, and Signal Processing, 1993 (ICASSP-93)|
|Period||1/04/93 → …|
A new video subband filtering architecture appropriate for VLSI implementation is presented. The system employs a reduced complexity multiply-accumulate structure realized using an extension to the primitive operator graph synthesis technique. This, in conjunction with a data multiplexing regime which implements a two channel quadrature mirror filter on a single finite impulse response (FIR) structure, has facilitated the fabrication of a sixty-four subband coder/decoder on a single gate array. The circuitry is reconfigurable, allowing vertical and horizontal filtering in analysis or synthesis mode. The authors describe the conceptual development of the new approach and present novel architectural features associated with its implementation. Also included are complexity comparisons with conventional approaches
Conference Proceedings/Title of Journal: Proc. IEEE Int. Conf. on Acoustics, Speech and Signal Processing
Rose publication type: Conference contribution
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IEEE International Conference on Acoustics, Speech, and Signal Processing, 1993 (ICASSP-93)
|Duration||1 Apr 1993 → …|