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Fast 2D-DCT implementations for VLIW processors

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageEnglish
Title of host publicationIEEE Multimedia Signal Processing Workshop
Publisher or commissioning bodyInstitute of Electrical and Electronics Engineers (IEEE)
Publication dateSep 1999
Pages655 - 660
ISBN (Print)0780356101
DOIs
StatePublished

Conference

Conference3rd IEEE Workshop on Multimedia Signal Processing
CountryDenmark
CityCopenhagen
Period1/09/99 → …

Abstract

This paper analyzes various fast 2D-DCT algorithms regarding their suitability for VLIW processors. Operations for truncation or rounding which are usually neglected in proposals for fast algorithms have also been taken into consideration. Loeffler's algorithm with parallel multiplications was found to be most suitable due to its parallel structure

Additional information

Rose publication type: Conference contribution Terms of use: Copyright © 1999 IEEE. Reprinted from IEEE 3rd Workshop on Multimedia Signal Processing, 1999. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Bristol's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it.

Event

3rd IEEE Workshop on Multimedia Signal Processing

Duration1 Sep 1999 → …
CountryDenmark
CityCopenhagen

Event: Conference

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