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Dr Daniel PagePh.D.(Bristol)

Senior Lecturer in Computer Science

11 - 20 out of 68Page size: 10
  1. 2012
  2. Published

    Fault attacks on pairing based cryptography: a state of the art

    El Mrabet, N., Page, D. & Vercauteren, F. R. G., 2012, Fault Analysis in Cryptography. Springer, p. 221-236

    Research output: Chapter in Book/Report/Conference proceedingChapter in a book

  3. Published

    Harnessing biased faults in attacks on ECC-based signature schemes

    Järvinen, K., Blondeau, C., Page, D. & Tunstall, M., 2012, Fault Diagnosis and Tolerance in Cryptography - FDTC 2012. Institute of Electrical and Electronics Engineers (IEEE), p. 72-82

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  4. Published

    On reconfigurable fabrics and generic side-channel countermeasures

    Beat, R., Grabher, P., Page, D., Tillich, S. & Wojcik, M., 2012, Field Programmable Logic - FPL 2012. Institute of Electrical and Electronics Engineers (IEEE), p. 663--66

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  5. Published

    Practical realisation and elimination of an ECC-related software bug attack

    Brumley, B., Barbosa, M. B. M., Page, D. & Vercauteren, F. R. G., 2012, Topics in Cryptology - CT-RSA 2012. Springer Berlin Heidelberg, Vol. 7178. p. 171-186

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  6. Published

    Using the cloud to determine key strengths

    Kleinjung, T., Lenstra, A., Page, D. & Smart, N. P., 2012, Progress in Cryptology - INDOCRYPT 2012. Springer Berlin Heidelberg, Vol. 7668. p. 17-39

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  7. 2011
  8. Published

    A unified multiply/accumulate unit for pairing-based cryptography over prime, binary and ternary fields

    Vejda, T., Groszschaedl, J. & Page, D., 2011, Digital System Design, Architectures, Methods and Tools - DSD 2011. Institute of Electrical and Electronics Engineers (IEEE), p. 658-666

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  9. Published

    An evaluation of hash functions on a power analysis resistant processor architecture

    Hoerder, S., Wojcik, M., Tillich, S. & Page, D., 2011, Workshop in Information Security Theory and Practice - WISTP 2011. Springer Berlin Heidelberg, Vol. 6633. p. 160-174

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  10. Published

    An exploration of mechanisms for dynamic cryptographic instruction set extension

    Grabher, P., Groszschaedl, J., Hoerder, S., Järvinen, K., Page, D., Tillich, S. & Wojcik, M., 2011, In : Journal of Cryptographic Engineering. 2, 1, p. 1-18 18 p.

    Research output: Contribution to journalArticle

  11. Published

    An exploration of mechanisms for dynamic cryptographic instruction set extension

    Grabher, P., Groszschaedl, J., Hoerder, S., Järvinen, K., Page, D., Tillich, S. & Wojcik, M., 2011, Cryptographic Hardware and Embedded Systems - CHES 2011. Springer Berlin Heidelberg, Vol. 6917. p. 1-16

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  12. Published

    Bit-sliced binary normal basis multiplication

    Brumley, B. & Page, D., 2011, Computer Arithmetic - ARITH 2011. Institute of Electrical and Electronics Engineers (IEEE), p. 205-212

    Research output: Chapter in Book/Report/Conference proceedingConference contribution