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An improved architecture for the adaptive discrete cosine transform

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageEnglish
Title of host publicationUnknown
Publisher or commissioning bodyInstitute of Electrical and Electronics Engineers (IEEE)
Pages742 - 745
ISBN (Print)078030730, 0780330730
StatePublished - May 1996
EventIEEE International Symposium on Circuits and Systems, 1996 - Atlanta, United States


ConferenceIEEE International Symposium on Circuits and Systems, 1996
Abbreviated titleISCAS '96
CountryUnited States
Period1/05/96 → …


This paper presents a new approach to the efficient realisation of the discrete cosine transform for the specific case of interlaced image sequence coding. In such cases, the conventional approach of decomposing each frame or frame difference into 8×8 blocks is often no longer satisfactory and an adaptive architecture capable of processing either 8×8 or two 4×8 blocks is desirable. The approach described is based on the decomposition used by Madisetti, modified to maximise shared hardware resources and to exploit arithmetic redundancy using primitive operator methods. The resulting architecture is compared with alternative implementation options using an area-time metric with savings in excess of 50% having been observed.

Additional information

Conference Proceedings/Title of Journal: IEEE intl. symp. on circuits and systems Rose publication type: Conference contribution Sponsorship: The authors wish to thank Sony Broadcast and Professional Europe and the Centre for Communications Research at Bristol University for their support of this work. Terms of use: Copyright © 1996 IEEE. Reprinted from IEEE International Symposium on Circuits and Systems, 1996 (ISCAS '96). This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Bristol's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to By choosing to view this document, you agree to all provisions of the copyright laws protecting it.


IEEE International Symposium on Circuits and Systems, 1996

Abbreviated titleISCAS '96
Duration1 May 1996 → …
CountryUnited States

Event: Conference

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